Implementation Of Fast Binary Sorting Network Generated By Counters. - VAISHNAVI, A.; NARAYANA, M. (Journal of Namibian Studies)
Parallel counters play an important role in many circuits that manipulate numbers, especially fast multipliers. Part of the crucial route in many DSP components is the parallel summing of several operands. High ratios of compression counters & compressors are required to speed up the totaling process. A new exact/approximate (4:2) compressor based on a sorting network is being developed for this project. Reordered sequences, which are uniquely portrayed through one-hot code sequences, are generated by feeding the counter's inputs into sorting networks in an asymmetric fashion. The counter's output Boolean expressions may be greatly simplified by using three specific Boolean equations created between the reorganized sequences on the one-hot code sequence. In addition, this undertaking is improved by developing scalable structures based on provided techniques for finding/sorting M biggest values from N inputs utilizing parallel sorting algorithms. The iterative sorting methods were also presented for locating the greatest values. The BUBBLE SORTING algorithm is one example of a parameteroptimized implementation of such an algorithm.