The Bulk Multicore Architecture for Improved Programmability. - TORRELAS, JOSEP; CEZE, LUIS; TUCK, JAMES; CASCAVAL, CALIN; INOS, PABLO MONTES; AHN, WONSUN; PRVULOVIC, MILOS (Communications of the ACM, 2009)
The article presents a general-purpose multicore processor architecture called the Bulk Multicore, which is optimized for maximum programmability. The need for hardware architecture to enable a programmable environment is noted, mentioning that programmability should ensure that the architecture is capable of high efficiency without requiring the programmer to manage low-level tasks and that the potential for parallel programming errors is minimized. The Bulk Multicore's satisfaction of these needs is described, noting its novel support for scalable hardware cache coherence, its inclusion of high-performance sequential memory consistency, and its introduction of novel hardware primitives that can support the building of an advanced program development and debugging environment.