Attack of the Killer Microseconds.
The article discusses the influence of low-latency I/O devices on efforts to mitigate microsecond-scale event latencies within computer systems. Topics include processor designers' development of techniques such as prefetching, out-of-order execution, and branch prediction to facilitate a deep memor...
| Publicado en: | Communications of the ACM Vol. 60; no. 4; pp. 48 - 55 |
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| Autores principales: | , , , |
| Formato: | Artículo |
| Publicado: |
Association for Computing Machinery
Apr2017
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| Materias: | |
| Acceso en línea: | Ver este registro en EBSCOhost |
| fields | @attributes: recordID: 1 pdfLink: plink: https://search.ebscohost.com/login.aspx?direct=true&db=hlh&AN=122295219&site=ehost-live header: @attributes: shortDbName: hlh uiTerm: 122295219 longDbName: Humanities International Complete uiTag: AN controlInfo: bkinfo: jinfo: jid: 00010782 ACM jtl: Communications of the ACM issn: 00010782 maglogo: N pubinfo: dt: Apr2017 vid: 60 iid: 4 pid: 68 pub: Association for Computing Machinery artinfo: ui: 122295219 10.1145/3015146 ppf: 48 ppct: 7 formats: tig: atl: Attack of the Killer Microseconds. aug: au: BARROSO, BY LUIZ MARTY, MIKE PATTERSON, DAVID RANGANATHAN, PARTHASARATHY affil: Google Fellow Vice President of Engineering at Google Inc., Mountain View, CA Senior staff software engineer and manager at Google Inc., Madison, WI Emeritus professor at the University of California, Berkeley Distinguished engineer at Google Inc., Mountain View, CA Principal engineer at Google Inc., Mountain View, CA su: Computer input-output equipment Computer systems management Memory hierarchy (Computer science) Computer programming Computer networks Application program interfaces Computer software development sug: subj: Computer input-output equipment Computer systems management Memory hierarchy (Computer science) Computer programming Computer networks Application program interfaces Computer software development ab: The article discusses the influence of low-latency I/O devices on efforts to mitigate microsecond-scale event latencies within computer systems. Topics include processor designers' development of techniques such as prefetching, out-of-order execution, and branch prediction to facilitate a deep memory hierarchy that works at nanosecond scale by providing a simple synchronous programming interface to memory systems, and computer scientists' creation of software-based techniques, such as operating system context switching, to handle millisecond-scale events. pubtype: Periodical doctype: Article src: R language: English refInfo: copyright: @attributes: flag: Y dt: @attributes: year: 2017 holdings: @attributes: islocal: N |
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