An Optimized S-Box Circuit for High Speed AES Design with Enhanced PPRM Architecture to Secure Mammographic Images.
In AES, the total time taken by the architecture while implementing in low power and high-speed circuit is the most important thing that to be considered. Also in AES, implementing S-Boxes consumes the major part of the total time consumed by the entire architecture. In this research paper, we propo...
| Publicado en: | Journal of Medical Systems Vol. 43; no. 2; pp. 1 - 2 |
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| Autores principales: | , , |
| Formato: | diagnostic images tables/charts Journal Article |
| Publicado: |
Springer Nature
Feb2019
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| Acceso en línea: | Ver este registro en EBSCOhost |
| fields | @attributes: recordID: 1 pdfLink: plink: https://search.ebscohost.com/login.aspx?direct=true&db=ccm&AN=134561912&site=ehost-live header: @attributes: shortDbName: ccm uiTerm: 134561912 longDbName: CINAHL Complete uiTag: AN controlInfo: bkinfo: dissinfo: jinfo: jid: 01485598 4N0 jtl: Journal of Medical Systems issn: 01485598 maglogo: N pubinfo: dt: Feb2019 vid: 43 iid: 2 pid: 237 pub: Springer Nature place: New York, New York artinfo: ui: 134561912 134561912 134561912 10.1007/s10916-018-1145-9 134561912 ppf: 1 ppct: 1 formats: fmt: – @attributes: type: T – @attributes: type: P tig: atl: An Optimized S-Box Circuit for High Speed AES Design with Enhanced PPRM Architecture to Secure Mammographic Images. aug: au: Manojkumar, T. Karthigaikumar, P. Ramachandran, Varatharajan affil: Department of Electronics and Communication Engineering, Karpagam College of Engineering, 641 032, Coimbatore, Tamil Nadu, India sug: subj: Mammography Data Security Methods Computer-Aided Design Encryption Utilization Algorithms Software Information Technology Privacy and Confidentiality Radiographic Image Interpretation, Computer-Assisted ab: In AES, the total time taken by the architecture while implementing in low power and high-speed circuit is the most important thing that to be considered. Also in AES, implementing S-Boxes consumes the major part of the total time consumed by the entire architecture. In this research paper, we propose a very low-power and high efficient S-Box circuit architecture: a multi-stage modified version of PPRM architecture over composite fields. In this modified S box design, only AND and Hazard transparent XOR gates are used. Because of this architecture dynamic hazards which form the main aspect of power consumption in S box gets eliminated. A low propagation delay of 4.58 ns and occupies 120 slices in the xilinx FPGA device xc6vlx75t-3ff784, while the low propagation delay and slice area is 5.552 ns and 120 respectively for the conventional PPRM architecture. This new proposed architecture is used to protect the mammographic images from being unauthorized access. pubtype: Academic Journal doctype: diagnostic images tables/charts Journal Article ougenre: Article language: English refInfo: holdings: @attributes: islocal: N |
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