Sparse Matrix Computations on Reconfigurable Hardware.

The article discusses how using a high-level language to hardware-description-language compiler with the Jacobi and conjugate gradient methods can be used to aid reconfigurable supercomputing and produce at least a twofold speedup. The authors tested both the Jacobi and conjugate gradient (CG) metho...

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Bibliographic Details
Published in:Computer (00189162) Vol. 40; no. 3; pp. 58 - 65
Main Authors: Prasanna, Viktor K., Morris, Gerald R.
Format: Article
Published: IEEE Mar2007
Subjects:
Online Access:View this record in EBSCOhost
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      dt: Mar2007
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        10.1109/MC.2007.103
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        atl: Sparse Matrix Computations on Reconfigurable Hardware.
      aug:
        au:
          Prasanna, Viktor K.
          Morris, Gerald R.
        affil:
          University of Southern California
          US Army Engineer Research and Development Center
      su:
        Field programmable gate arrays
        Conjugate gradient methods
        Compilers (Computer programs)
        Jacobi method
        Algorithms
        High performance processors
        Programming languages
        Adaptive computing systems
        Supercomputers
      sug:
        subj:
          Field programmable gate arrays
          Conjugate gradient methods
          Compilers (Computer programs)
          Jacobi method
          Algorithms
          High performance processors
          Programming languages
          Adaptive computing systems
          Supercomputers
      ab: The article discusses how using a high-level language to hardware-description-language compiler with the Jacobi and conjugate gradient methods can be used to aid reconfigurable supercomputing and produce at least a twofold speedup. The authors tested both the Jacobi and conjugate gradient (CG) methods in computers that combine general purpose processors with field-programmable gate arrays (FPGA) and those that run software only versions. They found that except for one instance, the FPGA-augmented version of CG and Jacobi outperformed the software. They believe because they used the same compiler, code and algorithm, run on the same platform, and use the same input sets, the comparisons show that the acceleration in processing speed is due to the FPGA.
      pubtype: Academic Journal
      doctype: Article
      src: R
    language: English
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