Warp Processing: Dynamic Translation of Binarles to FPGA Circuits.

The article focuses on warp processing, in which the binary kernels of a computer program are transformed into field-programmable gate array circuits using CAD/CAM system technology. This results in a dramatic increase in computational power and speed.

Detalles Bibliográficos
Publicado en:Computer (00189162) Vol. 41; no. 7; pp. 40 - 47
Autores principales: Vahid, Frank, Stitt, Greg, Lysecky, Roman
Formato: Artículo
Publicado: IEEE Jul2008
Materias:
Acceso en línea:Ver este registro en EBSCOhost
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        atl: Warp Processing: Dynamic Translation of Binarles to FPGA Circuits.
      aug:
        au:
          Vahid, Frank
          Stitt, Greg
          Lysecky, Roman
        affil:
          Professor, University of California, Riverside.
          Assistant professor, University of Florida.
          Assistant professor, University of Arizona.
      su:
        Computer integrated manufacturing systems
        Integrated circuits
        CAD/CAM systems
        Computer software
        Field programmable gate arrays
        Gate array circuits
        Programmable logic devices
      sug:
        subj:
          Computer integrated manufacturing systems
          Integrated circuits
          CAD/CAM systems
          Computer software
          Field programmable gate arrays
          Gate array circuits
          Programmable logic devices
      ab: The article focuses on warp processing, in which the binary kernels of a computer program are transformed into field-programmable gate array circuits using CAD/CAM system technology. This results in a dramatic increase in computational power and speed.
      pubtype: Academic Journal
      doctype: Article
      src: R
    language: English
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