| Summary: | The article discusses the use of models to verify and validate embedded software applications. Topics include software design specification, "in the loop" testing methods including model-in-the-loop, software-in-the-loop, processor-in-the-loop, and hardware-in-the-loop, timing considerations, managing complexity, and model-level tool support. The authors acknowledge that their treatment focuses on the application implementation of the electronic-control-unit software. Infrastructure software is at least the equal of application software in terms of complexity, and will require its own modeling regimen.
|
|---|