x86-TSO: A Rigorous and Usable Programmer's Model for x86 Multiprocessors.
Exploiting the multiprocessors that have recently become ubiquitous requires high-performance and reliable concurrent systems code, for concurrent data structures, operating system kernels, synchronization libraries, compilers, and so on. However, concurrent programming, which is always challenging,...
| Published in: | Communications of the ACM Vol. 53; no. 7; pp. 89 - 98 |
|---|---|
| Main Authors: | , , , , |
| Format: | Article |
| Published: |
Association for Computing Machinery
Jul2010
|
| Subjects: | |
| Online Access: | View this record in EBSCOhost |
| fields | @attributes: recordID: 1 pdfLink: plink: https://search.ebscohost.com/login.aspx?direct=true&db=hlh&AN=51912814&site=ehost-live header: @attributes: shortDbName: hlh uiTerm: 51912814 longDbName: Humanities International Complete uiTag: AN controlInfo: bkinfo: jinfo: jid: 00010782 ACM jtl: Communications of the ACM issn: 00010782 maglogo: N pubinfo: dt: Jul2010 vid: 53 iid: 7 pid: 68 pub: Association for Computing Machinery artinfo: ui: 51912814 10.1145/1785414.1785443 ppf: 89 ppct: 9 formats: tig: atl: x86-TSO: A Rigorous and Usable Programmer's Model for x86 Multiprocessors. aug: au: Sewell, Peter Sarkar, Susmit Owens, Scott Nardelli, Francesco Zappa Myreen, Magnus O. affil: University of Cambridge. su: Multiprocessors Computer software correctness Computer programming Distributed shared memory Computer multitasking Computer science sug: subj: Multiprocessors Computer software correctness Computer programming Distributed shared memory Computer multitasking Computer science ab: Exploiting the multiprocessors that have recently become ubiquitous requires high-performance and reliable concurrent systems code, for concurrent data structures, operating system kernels, synchronization libraries, compilers, and so on. However, concurrent programming, which is always challenging, is made much more so by two problems. First, real multiprocessors typically do not provide the sequentially consistent memory that is assumed by most work on semantics and verification. Instead, they have relaxed memory models, varying in subtle ways between processor families, in which different hardware threads may have only loosely consistent views of a shared memory. Second, the public vendor architectures, supposedly specifying what programmers can rely on, are often in ambiguous informal prose (a particularly poor medium for loose specifications), leading to widespread confusion. In this paper we focus on x86 processors. We review several recent Intel and AMD specifications, showing that all contain serious ambiguities, some are arguably too weak to program above, and some are simply unsound with respect to actual hardware. We present a new x86-TSO programmer's model that, to the best of our knowledge, suffers from none of these problems. It is mathematically precise (rigorously defined in HOL4) but can be presented as an intuitive abstract machine which should be widely accessible to working programmers. We illustrate how this can be used to reason about the correctness of a Linux spinlock implementation and describe a general theory of data-race freedom for x86-TSO. This should put x86 multiprocessor system building on a more solid foundation; it should also provide a basis for future work on verification of such systems. pubtype: Periodical doctype: Article src: R language: English refInfo: copyright: @attributes: flag: Y dt: @attributes: year: 2010 holdings: @attributes: islocal: N |
|---|