Why STM Can Be More Than A Research Toy.
The article discusses computer software transactional memory (STM) and its performance capabilities compared to sequential code. Aspects of multicore architectures, concurrent programming, the transactional-memory (TM) paradigm, and computer hardware transactional memory (HTM) are discussed. The art...
| Published in: | Communications of the ACM Vol. 54; no. 4; pp. 70 - 78 |
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| Main Authors: | , , , |
| Format: | Article |
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Association for Computing Machinery
Apr2011
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| Subjects: | |
| Online Access: | View this record in EBSCOhost |
| fields | @attributes: recordID: 1 pdfLink: plink: https://search.ebscohost.com/login.aspx?direct=true&db=hlh&AN=59582582&site=ehost-live header: @attributes: shortDbName: hlh uiTerm: 59582582 longDbName: Humanities International Complete uiTag: AN controlInfo: bkinfo: jinfo: jid: 00010782 ACM jtl: Communications of the ACM issn: 00010782 maglogo: N pubinfo: dt: Apr2011 vid: 54 iid: 4 pid: 68 pub: Association for Computing Machinery artinfo: ui: 59582582 10.1145/1924421.1924440 ppf: 70 ppct: 8 formats: tig: atl: Why STM Can Be More Than A Research Toy. aug: au: DRAGOJEVIĆ, ALEKSANDAR FELBER, PASCAL GRAMOLI, VINCENT GUERRAOUI, RACHID affil: Distributed Programming Laboratory, École Polytechnique Fédérale de Lausanne, Lausanne, Switzerland. Professor, Computer Science Department, Université de Neuchâtel, Neuchâtel, Switzerland. Postdoctoral researcher, Distributed Computing Laboratory, École Polytechnique Fédérale de Lausanne, Lausanne, Switzerland. Postdoctoral researcher, Computer Science Department, Université de Neuchâtel, Neuchâtel, Switzerland. Professor, Distributed Programming Laboratory, École Polytechnique Fédérale de Lausanne, Lausanne, Switzerland. su: Computer storage devices Computer input-output equipment Computer software Commercialization Paradigm (Theory of knowledge) sug: subj: Computer storage devices Computer input-output equipment Computer software Commercialization Paradigm (Theory of knowledge) ab: The article discusses computer software transactional memory (STM) and its performance capabilities compared to sequential code. Aspects of multicore architectures, concurrent programming, the transactional-memory (TM) paradigm, and computer hardware transactional memory (HTM) are discussed. The article notes that TM systems are not expected to become commercially available for a few years. The article discusses the ability of STM to offer TM functionality while avoiding the limitations of HTM. A summary of key insights offered in the article is presented. pubtype: Periodical doctype: Article src: R language: English refInfo: copyright: @attributes: flag: Y dt: @attributes: year: 2011 holdings: @attributes: islocal: N |
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