Reflection reduction on DDR3 high-speed bus by improved PSO.

The signal integrity of the circuit, as one of the important design issues in high-speed digital system, is usually seriously affected by the signal reflection due to impedance mismatch in the DDR3 bus. In this paper, a novel optimization method is proposed to optimize impedance mismatch and reduce...

Descripción completa

Detalles Bibliográficos
Publicado en:Scientific World Journal pp. 257972 - 257973
Autores principales: Li, Huiyong, Jiang, Hongxu, Li, Bo, Duan, Miyi
Formato: research Journal Article
Publicado: Wiley-Blackwell 2014
Acceso en línea:Ver este registro en EBSCOhost
fields @attributes:
  recordID: 1
pdfLink:
plink: https://search.ebscohost.com/login.aspx?direct=true&db=ccm&AN=103820611&site=ehost-live
header:
  @attributes:
    shortDbName: ccm
    uiTerm: 103820611
    longDbName: CINAHL Complete
    uiTag: AN
  controlInfo:
    bkinfo:
    dissinfo:
    jinfo:
      jid:
        1537744X
        1BX5
      jtl: Scientific World Journal
      issn: 1537744X
      maglogo: N
    pubinfo:
      dt: 2014
      pid: 480
      pub: Wiley-Blackwell
      place: Malden, Massachusetts
    artinfo:
      ui:
        103820611
        103820611
        NLM24778582
        2012565558
        10.1155/2014/257972
        NLM24778582
        PMC3977529
        103820611
      ppf: 257972
      ppct: 1
      formats:
      tig:
        atl: Reflection reduction on DDR3 high-speed bus by improved PSO.
      aug:
        au:
          Li, Huiyong
          Jiang, Hongxu
          Li, Bo
          Duan, Miyi
        affil: Beijing Key Laboratory of Digital Media, School of Computer Science and Engineering, Beihang University, Beijing 100191, China.
      sug:
        subj:
          Models, Theoretical
          Motor Vehicles
          Algorithms
      ab: The signal integrity of the circuit, as one of the important design issues in high-speed digital system, is usually seriously affected by the signal reflection due to impedance mismatch in the DDR3 bus. In this paper, a novel optimization method is proposed to optimize impedance mismatch and reduce the signal reflection. Specifically, by applying the via parasitic, an equivalent model of DDR3 high-speed signal transmission, which bases on the match between the on-die-termination (ODT) value of DDR3 and the characteristic impedance of the transmission line, is established. Additionally, an improved particle swarm optimization algorithm with adaptive perturbation is presented to solve the impedance mismatch problem (IPSO-IMp) based on the above model. The algorithm dynamically judges particles' state and introduces perturbation strategy for local aggregation, from which the local optimum is avoided and the ability of optimization-searching is activated. IPSO-IMp achieves higher accuracy than the standard algorithm, and the speed increases nearly 33% as well. Finally, the simulation results verify that the solution obviously decreases the signal reflection, with the signal transmission quality increasing by 1.3 dB compared with the existing method.
      pubtype: Academic Journal
      doctype:
        research
        Journal Article
      ougenre: Article
    language: English
    refInfo:
    holdings:
      @attributes:
        islocal: N