Single-Cycle Multihop Asynchronous Repeated Traversal: A SMART Future for Reconfigurable On-Chip Networks.

Future scalability for kilo-core architectures requires solutions beyond the capabilities of protocol and software design. Single-cycle multihop asynchronous repeated traversal (SMART) creates virtual single-cycle paths across the shared network between cores, potentially offering significant reduct...

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Detalles Bibliográficos
Publicado en:	Computer (00189162) Vol. 46; no. 10; pp. 48 - 56
Autores principales:	Krishna, Tushar, Chen, Chia-Hsin Owen, Park, Sunghyun, Kwon, Woo-Cheol, Subramanian, Suvinay, Chandrakasan, Anantha P., Peh, Li-Shiuan
Formato:	Artículo
Publicado:	IEEE Oct2013
Materias:	Scalability Software architecture Computer network protocols Systems design Asynchronous circuits
Acceso en línea:	Ver este registro en EBSCOhost

Descripción
Sumario:	Future scalability for kilo-core architectures requires solutions beyond the capabilities of protocol and software design. Single-cycle multihop asynchronous repeated traversal (SMART) creates virtual single-cycle paths across the shared network between cores, potentially offering significant reductions in runtime latency and energy expenditure.