Rethinking Caches for Throughput Processors.

The article discusses research on cache behavior and computer system performance. It references the study "Learning Your Limit: Managing Massively Multithreaded Caches Through Scheduling" by Timothy G. Rogers published in the current issue of the journal. Topics discussed include the different objec...

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Publicado en:Communications of the ACM Vol. 57; no. 12; pp. 90 - 91
Autor principal: Keckler, Stephen W.
Formato: Artículo
Publicado: Association for Computing Machinery Dec2014
Materias:
Acceso en línea:Ver este registro en EBSCOhost
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      aug:
        au: Keckler, Stephen W.
        affil:
          Senior director of architecture research, NVIDIA
          Adjunct professor, Department of Computer Science, University of Texas, Austin
      su:
        Cache memory
        Computer systems
        Computer performance
        Graphics processing units
        Central processing units
        Computer engineering
      sug:
        subj:
          Cache memory
          Computer systems
          Computer performance
          Graphics processing units
          Central processing units
          Computer engineering
      ab: The article discusses research on cache behavior and computer system performance. It references the study "Learning Your Limit: Managing Massively Multithreaded Caches Through Scheduling" by Timothy G. Rogers published in the current issue of the journal. Topics discussed include the different objectives for the cache that have led to different trade-offs in modern graphics processing unit (GPU) and central processing unit (CPU) systems.
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    language: English
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